1. Field of the Invention
The present invention relates to a source driver for display devices and, more particularly, to a source driver for driving data lines for a display panel.
2. Description of the Related Art
Display devices such as Liquid Crystal Display (LCD) have been used in various areas of industries. Generally, as shown in FIG. 1, a display device comprises a display panel DISPAN, a gate driver GDRV, and a source driver SDRV. The display panel DISPAN displays images according to data provided thereto. The gate driver GDRV selects and drives gate lines GL in the display panel DISPAN. The source driver SDRV provides gradation voltages to data lines DL in the display panel DISPAN for displaying images. At this time, the gradation voltages are corresponding to digital data DDAT which is provided from a controller UCON through a data bus DA_BUS. The controller UCON generates control signals to control the gate driver GDRV and the source driver SDRV.
As shown in FIG. 2, pixels are arranged in the display panel DISPAN at regions where the data lines DLs and the gate lines GLs are intersecting each other. The pixels are driven with the gradation voltages corresponding to the data provided through the data lines DL. The gradation voltages are provided to the display panel DISPAN from the source driver SDRV.
In general, the pixels PIXs in the display panel DISPAN are driven with a data inversion driving method. According to the data inversion driving method, as shown in FIG. 3, the pixels PIXs in the display panel DISPAN are each alternatively driven with a positive polarity of a gradation voltage and a negative polarity of the gradation voltage. For example, a pixel PIX of FIG. 3 is driven with the positive polarity of a gradation voltage in a first field, and then the pixel PIX is driven with the negative polarity of the gradation voltage in a second field.
The source driver SDRV, which is driven with a data inversion driving method, includes a positive decoder and a negative decoder for decoding display data. At this time, a layout region of the positive decoder is separated from that of the negative decoder. The positive decoder generates the positive polarity of the gradation voltage, and includes PMOS transistors. The negative decoder generates the negative polarity of the gradation voltage, and includes NMOS transistors.
For effective layout of the positive decoder and the negative decoder, two data lines DLs are shared by the positive decoder and negative decoder. In this case, it is required that the display data of each data line DL is alternatively coupled to the positive decoder and negative decoder. For such a construction, many transistors are required for data inversion driving method.